DFT再了解(四)

Ad Hoc DFT

Adding testability logic at designer’s discretion
Example: control points or observe points

Other examples: bus keepers or pull-up resistors
Location and type left up to designer’s DFT savvy












As SoC designs adopt more kinds of on-chip logic, however, there is a competing trend.

Embedded memories, IP cores, and on-chip analog blocks all present diverse test needs.

Making these different kinds of circuits testable often requires ad hoc DFT techniques.

Test-point logic is nonfunctional—that is, not a requisite part of on-chip application logic.

Adding it to the chip represents overhead, but can provide large gains in testability.


Conclusion:
You will need to utilize both structured and ad hoc DFT to meet SOC test requirements.