Digital Circuit Functional Verification(一)

先參考一下文件
211.100.26.59/data/myspace/1/6351/bbs/1184337901/7a2087d6.pdf

及
Writing Testbenches--Functional Verification of HDL Models這本書(資料原始出處)

整理出一些內容以作未來參考

为什么要研究测试

1. 随着门电路数目和系统复杂性以指数倍增，在产品设计中使工程师最费神的将会是：
    功能测试。

2. 硬件设计人员中间调查发现，60%到80%的时间是花在测试上的。

3. 使得系统测试更加快捷和精确的关键在于工具的改进和方法的革新(如UVM, SystemC, SVA...)

4. 测试方面缺乏成熟而系统的理论指导

5. 未来最好的测试方法将会是独立于开发工具的，以便于随时采用更为先进的方法来进行测试


测试的目的: 
1) 确定向测试对象输入向量，
2) 预期的测试对象输出。

gcc 編譯器移植參考資料

GNU的GCC用的非常多了
但對一個要自行設計或維護CPU/DSP的人來說
一個客製化的GCC或說tool-chain就是非常需要了


參考陳教授的網站

http://ccckmit.wikidot.com/gcc:ref

GNU的GCC說明區
http://gcc.gnu.org/onlinedocs/gcc-2.95.3/gcc.html#SEC_Top

http://sp1.wikidot.com/gcccrosscompiler


http://gcc.gnu.org/onlinedocs/gccint/

wiki上的說明
http://en.wikipedia.org/wiki/GNU_Compiler_Collection

http://en.wikipedia.org/wiki/GNU_toolchain


跨平台編譯((CrossCompiler CrossCompiler))可參考
跨平台編譯小說明

http://sp1.wikidot.com/gcccrosscompiler

risc cpu @ systemc

risc cpu @ systemc
轉貼自http://funningboy.blogspot.com/2010/09/risc-cpu-systemc.html?showComment=1317181463530#c126477895408032611


因為原來在systemc-2.2.0的example下的risc_cpu
Compile後，run simulation，會有錯誤發生
所以作者將它修正後，提供下載

hi all, If you are interest in the CPU architecture design,i think the 'rsic cpu' is a good choice.It is a sample package in systemc example, but it contain some problems with multi-drive. What's the multi-drive, it means the multi inputs drive the same output. you can image the data in this point is unstable, it should be 1 or 0 or x.... ,so the compiler would confuse what's the data in it.Because in systemc is no wire definition, in 'sc_signal' declare it like the register or buffer design, it would keep the current data until the next trigger to change it's data. we use a very sample way to avoid it, to create a new module and change the declare of 'sc_signal' to 'sc_in' and 'sc_out' . all new packages and version is release in here please use this command to compile our package.

原作者修正問題後的Package下載點
https://sites.google.com/site/funningboy/c/2010_1003_risc_cpu.tar.gz?attredirects=0&d=1

使用以下指令去compile risc_cpu files
g++ *.cpp -I/usr/systemc/include -L/usr/systemc/lib-linux -o cpu -lsystemc

如果是64bits
g++ *.cpp -I/usr/systemc/include -L/usr/systemc/lib-linux64 -o cpu -lsystemc 


修正的方法
1 fix lists 1. multi drive example Error: (E115) sc_signal cannot have more than one driver: signal `STALL_FETCH' (sc_signal) first driver `PAGING_BLOCK.port_13' (sc_out) second driver `BIOS_BLOCK.port_6' (sc_out) In file: ..\..\src\sysc\communication\sc_signal.cpp:126 2. data cache miss the environment of dcache is unconnected, we replace it by mem architecture,that can be work on "lw,sw" commands 3. branch && jump conditions not work fix the program counter to jump && branch condition  

執行的方法
2. how to use

//1 use this command to load our asm code 2 icache file

perl assembler.pl test2.asm -code > icache

//2 use this command to get visible asm code

perl assembler.pl test2.asm  > view

//3 run and check

./cpu

在Centos5.x版上安裝nedit及ddd

因為原始的CentOS5.x上面沒有nedit及ddd
所以對於習慣於這兩個工具的人
可按照以下方法下載與安裝

先到
64bits: http://pkgs.org/centos-5-rhel-5/centos-rhel-x86_64
32bits: http://pkgs.org/centos-5-rhel-5/centos-rhel-updates-i386

下載rpm檔(以64bits為例)
ddd-3.3.11-14.el5.4.x86_64.rpm 
nedit-5.5-16.el5.x86_64.rpm

但如果有缺少*Xm*.so之類
是因為沒有安裝openmotif
所以要下載
openmotif-2.3.1-5.el5_5.1.x86_64.rpm


每一個rpm 都可用
rpm -ivh  xxx.rpm來安裝 (需要root權限)

安裝完，立刻就可以用了

為學日益，為道日損。 損之又損，以至於無為。無為而無不為。

這篇講的其實就很道家思想。人生中在學習這個面向，應該以每天都能「增加」為目標，也就是每天都要在知識、思維上有所成長。反之如果是在求道的路途上，就應該要每天以「減少」為目標，減少什麼？慾望、爭鬥....等等對偏離正道之事。不斷減少這些累贅之事就能到達無為的境界，無為後則能體悟無不能為之事，心靈上才能得到真正的自由，而此時才能全心全靈的發揮自身的才華。

意思是說：追求學問，就要求天天都學有所得，習有所成。而追求大道呢，只是要求每天盡量減少自己的欲望和行為。對自己的欲望和行為減之再減，堅持不懈的一直減下去，最後就可以達到無為的境界了。達到了無為的境界之後就會發現，已經沒有什麼事情不可以實現了。這就是物極必反的道理啊！

「為學日益」是說向外追求學問，通過學習獲得科學技術知識，學習知識與技術要不斷的豐滿完善、才能做到精益求精。而「為道日損」是指向內追求智慧，通過默修開啟潛意識，從物質到精神過程中的私心雜念都要一一剪除，以期求人與自然的便捷溝通，與道會合，實現藝術與人生的最佳狀態。損之又損、減之又減、簡而再簡、約而再約，「道」便顯露出來。在這個求「道」的過程中，就可以開闢出一塊廣闊的空間來。這是一個修煉的過程，也是一個去雜念而存樸質的過程。


不斷的學習研究外在的科學技術知識，人類的科學技術知識就會一天比一天增加。不停的修煉心性並守德，開發潛在的智慧，自私自我的主觀意識就會一天比一天減少，減少再減少，直至自我的思想意識完全符合宇宙的真理，也就取得了無所不為的大智大慧。因此，無為與守拙是學道悟道的最高境界，一個人如果能達到這種境界，也就是心靈修煉達到上乘的境界了。

EDA Tools的路徑指定

一個參考的例子
# .bashrc

# User specific aliases and functions

# Source global definitions
if [ -f /etc/bashrc ]; then
    . /etc/bashrc
fi

export UVM_REF_HOME=/mnt/eda/test/uvm_ref_flow_1.02

export LD_LIBRARY_PATH=/mnt/eda/Novas/Novas_201010/share/PLI/IUS/LINUX
export VERDI_HOME=/mnt/eda/Novas/Novas_201010

#export LM_LICENSE_FILE=/mnt/eda/Cadence/IUS92/License.dat
export IUS_LICENSE_FILE=/mnt/eda/Cadence/IUS92_Hotfix40/IUS92/License.dat

export PATH=/usr/java/default:/usr/java/default/bin:/mnt/eda/eclipse:$PATH

export PATH=/mnt/eda/eclipse/eclipse:$PATH

export JAVA_HOME="/usr/java/default"

export SYNOPSYS="/mnt/eda/Synopsys"

#export PATH=$SYNOPSYS/dc/bin:$SYNOPSYS/scl_v10.9.3/linux/bin:$PATH
export PATH=$SYNOPSYS/scl_v10.9.3/linux/bin:$PATH

#setenv LM_LICENSE_FILE 27000@Linux213

export SNPSLMD_LICENSE_FILE=27000@centos4

LM_LICENSE_FILE=/mnt/eda/Synopsys/synopsys.dat:$IUS_LICENSE_FILE
export LM_LICENSE_FILE

export VCS_HOME=/mnt/eda/Synopsys/vcs2009.12
export PATH=$PATH:$VCS_HOME/bin
export VCS_ARCH_OVERRIDE=linux

DC_HOME=/mnt/eda/Synopsys/dc2009.06
PATH=$PATH:$DC_HOME/bin:$DC_HOME/linux/syn/bin
export PATH
alias da='design_analyzer'
alias dv='design_vision'
alias dvt='design_vision -tcl_mode'

PT_HOME=/mnt/eda/Synopsys/pt200912
export PATH=$PATH:$PT_HOME/bin:$PT_HOME/linux/syn/bin

export SYNOPSYS=/mnt/eda/Synopsys/tx2009.12
export SYNOPSYS_TMAX=/mnt/eda/Synopsys/tx2009.06

TMAX_HOME=/mnt/eda/Synopsys/tx2009.06
#alias tmax 'TMAX_HOME/bin/tmax \!*'
export PATH=$PATH:$TMAX_HOME/bin:./

#/mnt/eda/Synopsys/scl_v10.9.3/linux/bin/lmgrd  -c   /mnt/eda/Synopsys/synopsys.dat  -l
#/mnt/eda/Synopsys/license.log

#export PATH=$PATH:/mnt/eda/Cadence/IUS92/tools/bin
#export PATH=$PATH:/mnt/eda/Cadence/IUS102/tools/bin
export PATH=$PATH:/mnt/eda/Cadence/IUS92_Hotfix40/IUS92/tools/bin

export PATH=$PATH:/mnt/eda/Novas/Novas_201010/bin

在紅字中的路徑，有一些特別的tools可以使用(synopsys)
因此路徑需特別指定

TortoiseSVN 最佳 SVN Client 軟體(安裝與Commit)

參考http://demo.tc/Post/591

因為http://opencores.org的檔案需要用SVN來下載
 所以需要一套SVN的client

到官網下載
http://tortoisesvn.tigris.org/

我是使用windows7
因此下載64bits的版本

安裝使用NEXT一路到完
因為整合到檔案總管，因此要重新開機

重開機後，在檔案總管內選擇一個要下載的目錄

然後按右鍵就會出現SVN Checkout

然後將下載路徑貼上就可以了

例如我到http://opencores.org/openrisc,gnu_toolchain
要下載
svn co http://opencores.org/ocsvn/openrisc/openrisc/trunk/gnu-src

那我就將後面的網址http://opencores.org/ocsvn/openrisc/openrisc/trunk/gnu-src
貼到tool上就可以了
當然硬碟目錄可以自行設定

PrimeTime再了解(二十七)

 Timing Exception Impact
特別時序指令的衝擊

1. 特別時序指令會花費許多的運算
Complexity of Timing Analysis ~=  
Latches + Flip--flops +   Timing exceptions + Clocks

例如一個指令如下
dc_shell-t> set_false_path -from U_CONTROL/reg*/CP -to U_DATA/reg*/D
如果reg是32bits 那就需要32x32 = 1024的運算

 2. 為了避免設定錯誤可以採用以下指令來看有設了那些特別時序指令

DC就用  report_timing_requirements -ignore

PT就用 report_exceptions

對於disable timing 就用 report_disable_timing

如何在PT及DC中加入新的指令

在DC或PT中如果要加上一個新的指令，如同report_timing,

可以用proc來做

加入一個加法指令
pt_shell> proc plus {a b} { return [expr $a + $b]}

 加入一個help說明
pt_shell> define_proc_attributes plus -info "Add two numbers" \
            -define_args { \
            {a "first addend" a string required} \
            {b "second addend" b string required} \
            {"-verbose" "issue a message" "" boolean optional}}


使用help的結果
pt_shell> help -verbose plus
Usage: plus    # Add two numbers
    [-verbose]         (issue a message)
    a                  (first addend)
    b                  (second addend)


使用指令的結果
pt_shell> plus 5 6
11

另一種方法Parsing Arguments Passed in to a Tcl Procedure

 加入一個argHandler的指令
proc argHandler {args} {
  parse_proc_arguments -args $args results
  foreach argname [array names results] {
    echo "  $argname = $results($argname)"
  }
}



添加指令變數
define_proc_attributes argHandler \
  -info "Arguments processor’ \
  -define_args {
  {{-Oos "oos help" AnOos one_of_string
      {required value_help {values {a b}}}}
   {-Int "int help" AnInt int optional}
   {-Float "float help" AFloat float optional}
{-Bool "bool help" "" boolean optional}
   {-String "string help" AString string optional}
   {-List "list help" AList list optional}}
   {-IDup "int dup" AIDup int {optional merge_duplicates}}}

使用help來看變數資訊
pt_shell> argHandler -help
Usage: argHandler    # argument processor
-Oos AnOos (oos help: Values: a, b)
[-Int AnInt]         (int help)
[-Float AFloat]      (float help)
[-Bool] (bool help)
[-String AString]    (string help)
[-List AList]        (list help)
[-IDup AIDup]        (Int dup)

錯誤使用後的反應
pt_shell> argHandler -Int z
Error: value 'z' for option '-Int' not of type 'integer'
(CMD-009)
Error: Required argument ‘-Oos’ was not found (CMD-007)


正確使用的反應
pt_shell> argHandler -Int 6 -Oos a -IDup 2 -IDup 3
  -Int = 6
  -Oos = a
  -IDup = 2 3

PrimeTime再了解(二十六)

Pre/Post Layout Clock

For post-CTS (Clock Tree Synthesis) static timing analysis set_propagated_clock 
forces the analyzer to calculate the ACTUAL clock tree skew, latency and transition times.

The post-CTS constraints therefore do not include ideal transition and network latency commands.

If the uncertainty number used during synthesis includes jitter and/or margin, these effects must still be included in the post-CTS analysis, along with the external source latency.

PrimeTime再了解(二十五)

Using Pulse Clocks

有三種方法來設定
1.  Use a pulse generator cell that has been characterized with pulse generator attributes in
the .lib description.

2. Use the create_generated_clock command to describe the pulse timing with respect
to the source clock.

3.  Use the set_clock_sense command to specify the sense of the generated pulses with
respect to the source clock.

方法一

The best method is to use a pulse generator cell that has been characterized in its .lib library
description. In that case, no additional action is necessary in PrimeTime to specify the pulse
clock characteristics. For information about specifying the pulse generator characteristics of
a library cell, see the Library Compiler documentation.

方法二

To specify the generated pulse clock CLKP as a generated clock:
pt_shell> create_generated_clock -name CLKP -source CLK  \
          -edges {1 1 3} [get_pins and2/z]
Specifying the generated clock as a pulse clock using repeated edge digits (rather than
specifying the pulse clock edge times) ensures correct checking of delays between the
source clock and the pulse clock.

In general, the position of the repeated digit determines whether an active-high or active-low
pulse is generated, and the edge number that is repeated determines the type of edge in the
master clock used to trigger the pulse:
•   -edges {1 1 3} -- rising edge of source triggers high pulse
•   -edges {2 2 4} -- falling edge of source triggers high pulse
•   -edges {1 3 3} -- rising edge of source triggers low pulse
•   -edges {2 4 4} -- falling edge of source triggers low pulse

方法三

Instead of using the create_generated_clock command to define a new clock, you can
use the set_clock_sense command to specify the sense of the existing clock:
pt_shell> set_clock_sense -pulse rise_triggered_high_pulse get+pins and2/z

In general, the clock sense of a pulse clock can be specified at a location in the design by
one of the following forms of syntax:
set_clock_sense -pulse rise_triggered_high_pulse object_list
set_clock_sense -pulse rise_triggered_low_pulse object_list
set_clock_sense -pulse fall_triggered_high_pulse object_list
set_clock_sense -pulse fall_triggered_low_pulse object_list

另一個set_clock_sense的例子

set_clock_sense -clock CLK -pulse rise_triggered_high_pulse [get_pins AND/Z]

另外對於propagated latency可以參考

The nominal width of the generated pulses is zero, whether you use a pulse generator cell
defined in the library, the create_generated_clock command, or the set_clock_sense
command. To determine the actual pulse width, PrimeTime considers the different rise and
fall latency values at the pulse generator output pin.
 (high pulse width) = (fall network latency) – (rise network latency)
 (low pulse width) = (rise network latency) – (fall network latency)
You can allow PrimeTime to calculate the propagated latency from the circuit, or you can use
the set_clock_latency command to specify the latency values (and therefore the pulse
width) explicitly. For example, to set an ideal pulse width to 0.5 for high pulses, for all
registers downstream from pin and2/z, and with an overall latency of 0.6, the commands
would be:
pt_shell> set_clock_latency -rise 0.6 and2/z
pt_shell> set_clock_latency -fall 1.1 and2/z



Constrain Minimum and Maximum Pulse Width in the Fanout of
Pulse Generator Cells

PrimeTime provides the ability to constrain the pulse clock network. The transitive fanout of
pulse generator is referred to as pulse clock network. The clock propagating through the
pulse generator in the pulse clock network is referred to as the pulse clock. However, if the
pulse generator has sequential arcs, its output is not a clock signal unless a generated clock
is defined at the output. Use the set_pulse_clock_min_width and
set_pulse_clock_max_width commands to constrain the pulse generator networks.

set_pulse_clock_min_width -transitive_fanout value object_list

set_pulse_clock_max_width -transitive_fanout value object_list

Regular Expressions in DC and PT

一些使用上的例子
 
 set gc [get_cells -regexp {i(1|2)_.*}]

 get_cells blk* -filter "ref_name =~ AN*"
get_cells -regexp {blk.*} -filter "ref_name =~ AN.*"

report_timing -from [list i1/* [get_pins -regexp $expr]]

get_cells -regexp i1.*

get_cells -regexp i1/i2.*/n1

get_cells -regexp -hierarchical ".*"  -filter {base_name == n1}

get_cells -regexp {.*U1.*}
This matches U1, U11, U1A, U1_23, plus ZU1, ZZU1, hello_U1, and so forth.

filter_collection -regexp [get_ports *] {full_name =~a\[[0-1]\]}

get_ports -regexp [list {a\[[0-1]\]}]
get_ports -regexp {{a\[[0-1]\]}}
get_ports -regexp {a\\[[0-1]\\]}
These two commands are essentially equivalent. Proper list forms require single backslash
quoting (\), just like string arguments. It is recommended that you use a properly formatted
list for a list argument, especially in this situation. However, when you pass a single string
into the “patterns” argument, double backslash quoting (\\) is required.