DFT再了解(二十二)

set_dft_signal的使用方法

The set_dft_signal command is used to define
signals that are required for the test protocol

set_dft_signal -view
-type
-port
-active_state <0 | 1>
-hookup_pin
-timing

DFT Compiler uses views with the set_dft_signal
command to control how DFT signal are used by
dft_drc and insert_dft

 1. -view spec : DFT signals that DFT Compiler should use
during insert_dft (default) ONLY for insert_dft

2. -view existing_dft : DFT signals which must be
understood for the design to pass dft_drc
ONLY for dft_drc


The –view options can be abbreviated. For example:
“-view spec” -> “-view s” -> “-v s”
“-view existing_dft” -> “-view exist” -> “-v e”

-timing option is used to define
timing and waveform for a clock or reset signal


Specify a Clock
set test_default_period 100
set_dft_signal –view existing_dft \
-type ScanClock \
-port clock –timing [list 45 55]










Specify a Reset set_dft_signal –view existing_dft \
-type Reset \
-port resetn –active_state 0

Specify a Constant set_dft_signal –view existing_dft \
-type Constant \
-port atpgmode –active_state 1

Since the connection is made to bypass reset using atpgmode, we define this port as
“–view existing_dft –type constant” NOT “–type TestMode”.

Specify a Scan In
set_dft_signal \
-view spec
-type ScanDataIn \
-port test_si \
-hookup_pin U1/Z

Specify a Scan Out
set_dft_signal \
-view spec
-type ScanDataOut \
-port test_so \
-hookup_pin U2/A

Specify a Scan Enable
Scan enable used for both dft_drc and insert_dft
set_dft_signal –view exist –active 1 \
-type ScanEnable -port test_se \
-hookup_pin U3/Z

set_dft_signal –view spec –active 1 \
-type ScanEnable -port test_se \
-hookup_pin U3/Z













1. Since the scan enable is already routed to the clock gating cells and we need dft_drc to understand that it will be set to a 1 during shift, we need to declare the test_se port as
–view exist.

If It was only declared as –view spec, then dft_drcwill flag all the flops that are driven by
these clock gating cells as violated. You will end up with uncontrollable clock violations D1/D9.