Design Compiler再了解(二十二)

收集相關聯的net/pin/port/cell...的用法

1. 使用排除方式
remove_from_collection的範例用法

set all_inputs_except_clk \
[remove_from_collection [all_inputs] \
[get_ports *CLK*]]

把所有的input port中的clk相關的都排除掉

2. 另外也可以用filter的功能，收集想要的部份

Use the filter_collection command to get only
objects you are interested in:
The -filter option is a nice short-cut:
Relational operators are:
==, !=, >, <, >=, <=, =~, !~

filter_collection [get_cells *] “ref_name =~ AN*”
filter_collection [get_cells *] “is_mapped != true”
get_cells * -filter “dont_touch == true”
set fastclks [get_clocks * -filter “period < 10”]

get_cells -hier -filter “is_unmapped != true”
get_cells -hier -filter “is_hierarchical == true”

3. 另外的迴圈式的收集方法
foreach_in_collection cell [get_cells -hier * -filter \
“is_hierarchical == true”] {
echo “Instance [get_object_name $cell] is hierarchical”
}