PrimeTime再了解(十三)

generated_clocks

create_clock -name CLK1 -period 5 [get_ports CLK1]
create_clock -name CLK2 -period 10 [get_ports CLK2]
create_generated_clock -name GCLK1 -divide_by 2 -master_clock \
[get_clocks CLK1] [get_pins U3/Q] -source [get_ports CLK1] -add
create_generated_clock -name GCLK2 -divide_by 2 -master_clock \
[get_clocks CLK2] [get_pins U3/Q] -source [get_ports CLK2] -add
set_case_analysis 0 SCAN_MODE